CK-S6-SP623-G【PDF 23/48 页】BOARD DEV S6 WITH TX

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Detailed Description

GTP Transceiver Clock Input SMAs

[ Figure 1-2 , callout 18 ]

The SP623 board provides differential SMA connectors that can be used for connecting an

external function generator to all GTP transceiver reference clock inputs of the FPGA. The

FPGA reference clock pins are connected to the SMA connectors as shown in Table 1-13 .

Table 1-13:

GTP Transceiver Clock Inputs to the FPGA

FPGA Pin

B10

A10

D11

C11

D15

C15

B16

A16

AE11

AF11

AC12

AD12

AC16

AD16

AE17

AF17

Net Name

101_REFCLK0_P

101_REFCLK0_N

101_REFCLK1_P

101_REFCLK1_N

123_REFCLK0_P

123_REFCLK0_N

123_REFCLK1_P

123_REFCLK1_N

245_REFCLK0_P

245_REFCLK0_N

245_REFCLK1_P

245_REFCLK1_N

267_REFCLK0_P

267_REFCLK0_N

267_REFCLK1_P

267_REFCLK1_N

SMA Connector

J59

J60

J49

J50

J70

J61

J72

J71

J80

J81

J82

J83

J92

J93

J94

J95

USB to UART Bridge

[ Figure 1-2 , callout 19 ]

Communications between the SP623 board and a host computer are through a USB Mini-B

cable connected to J9. Control is provided by U26, a USB to UART bridge (Silicon

Laboratories CP2103). Table 1-14 lists the pin assignments and signals for the USB

connector J9.

Table 1-14:

USB Mini-B Connector Pin Assignments and Signals

J9 Pin

1

2

3

4

Signal Name

VBUS

USB_DATA_N

USB_DATA_P

GROUND

Description

+5V from host system (not used)

Bidirectional differential serial data (N-side)

Bidirectional differential serial data (P-side)

Signal ground

SP623 Board User Guide

UG751 (v1.1) September 15, 2010

23

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